LTspice goodies - Digital models
digital logic - 'Time step too small' Error when simulating d-flip-flop in LTSpice - Electrical Engineering Stack Exchange
Some questions regarding ripple counter and 74HCT - Electrical Engineering Stack Exchange
JK Flip Flop - YouSpice
D level-sensitive Latch in CMOS IC - YouSpice
BVLSI 2020 - Inderjit Singh
JK Flip-Flop Cuunter Design a 3-bit counter using JK | Chegg.com
Embedded Components and Tools Blog Center
D Flip Flops simulation using PSpice : tutorial 12
T Flip Flop by a D Flip Flop - YouSpice
Embedded Components and Tools Blog Center
Digital Tutorial Lesson 3: Building a Shift Register Using D Flip-Flops - Emagtech Wiki
555 Timer's SR Flip Flop with OP Amps | All About Circuits
Embedded Components and Tools Blog Center
555 - Need help for a Dflop implementation in LTspice - Electrical Engineering Stack Exchange
flipflop - Cyclical output counts from a D Flip Flop, what is this effect called? - Electrical Engineering Stack Exchange
LTSpice Help (JKFF) : r/AskElectronics
JK Flip Flop - Basic Online Digital Electronics Course
JK Flip Flop by a D Flip Flop - YouSpice
Simulator Reference: JK Flip Flop
digital logic - Why is this D flip flop not working in LTspice? - Electrical Engineering Stack Exchange
Simulated JK flip flop is toggling at the inverted output, but not the main output. Why? : r/AskElectronics
SR flip flop design in Ltspice | Forum for Electronics
Digital Tutorial Lesson 3: Building a Shift Register Using D Flip-Flops - Emagtech Wiki
flipflop - LTSpice D flip-flop not working - Electrical Engineering Stack Exchange
Request for the spice model for CD4075B(Or gate), CD74HC107 (JK Flip Flop) and TPS60400(inverter) - Logic forum - Logic - TI E2E support forums
